How glass could keep Moore’s Law alive
Traditional chips are nearing their physical limits, and the semicon industry is at a crossroads. Glass offers a path forward.
As silicon-based chip scaling reaches its physical limits, the semiconductor industry is turning to glass to unlock the next era of innovation.
- Moore’s Law is slowing down, prompting a shift from transistor miniaturization to advanced chip packaging.
- Glass enables denser, faster, and more efficient chip integration thanks to its structural and electrical advantages.
- SCHOTT is helping drive this transition with decades of glass science expertise.
- Glass-core substrates could shape the future of AI, connectivity, and everyday devices.
In April of 1965, a 36-year-old engineer named Gordon Moore published a brief article in Electronics Magazine that would shape the future of computing. Moore, then the director of research and development at Fairchild Semiconductor, made a striking prediction: the number of transistors in an integrated circuit would double every two years, exponentially increasing computing power. "Integrated circuits will lead to such wonders as home computers," he wrote, forecasting a world filled with smart devices, digital communication, and automated everything.
At the time, most computers filled entire rooms. They were noisy, expensive, and required teams of specialists to operate. The idea that they might one day be found in watches, cars, or pockets seemed implausible at best.
Yet Moore's Law, as his projection came to be known, proved startlingly accurate. For decades, the industry rode the momentum of ever-smaller transistor structures—made primarily from silicon and organic substrates—to build faster, more powerful chips. It was the engine of the digital revolution, enabling smartphones, cloud computing, and even the rise of artificial intelligence. But that era is drawing to a close.
Where Moore’s Law meets the laws of physics
"Today, we are approaching the molecular limits for feature size," explains Colin Schmucker, New Business Development Manager for SCHOTT Semicon Glass Solutions. An advanced chipmaking technology called “High Numerical Aperture Extreme Ultraviolet Lithography” (or “High-NA EUV”) is rolling out into the market. Largely considered the next – and possibly final – step in traditional transistor scaling, High-NA EUV allows semiconductor manufacturers to print smaller and more precise patterns on silicon wafers.
By using extremely short wavelengths of light (13.5 nanometers) to create ultra-small chip features, High-NA EUV essentially pushes the boundaries of how tiny and complex transistors can be before physical limitations make further miniaturization nearly impossible.
“Eventually we will run into quantum tunneling issues if we further shrink the transistors,” Colin says. “As such, scaling will become more dependent on the semiconductor package compared to the semiconductor chip itself."
"The advancements in photolithography have resulted in a continuation of Moore’s Law; however, with smaller features comes increasingly complex chip design demands," says Colin. “Designing the most cutting-edge semiconductors has become an increasingly expensive endeavor – development and tape-out costs now reach into the hundreds of millions of dollars.”
To solve this, engineers have shifted their attention from the chip itself to its broader package – the layered structure that connects, powers, and protects the chip. "Over the last decade, the focus on advanced packaging has increased significantly to address these demands,” Colin explains. Instead of focusing solely on transistor size, the next generation of innovation looks at how multiple chips can work together more efficiently.
“Heterogeneously integrating legacy (cheaper) semiconductors with smaller advanced node (expensive) semiconductors enables an overall more cost and compute-efficient semiconductor device,” he adds. “All of which is done at the package level – often using chiplets, which split the function of a multifunctional semiconductor chip into separate chips using the most economically-efficient technology that can be combined."
This new approach requires materials with properties that traditional substrates can’t offer – and that’s where glass comes in.
Deep Dive: How do material properties improve performance?
- Stiffness ensures mechanical stability for the ultrafine wiring and components required in high-performance computing. Rigidity helps keep delicate wiring in place, ensuring fast, reliable performance at microscopic scales.
- Structure-ability, or the ability to create microscale features, supports dense interconnects and efficient design – enabling data to move faster and more efficiently between chip components.
- Electrical insulation is critical to prevent signal interference, which becomes increasingly important as signal speeds increase.
- Thermal expansion compatibility ensures that the materials inside a package expand and contract at similar rates, reducing stress and potential failure over time.
"Glass is considered one of the key enabling materials for these advancements in heterogeneous integration," Colin says. "It has a few inherent benefits that other materials available to package designers don’t. For instance, it’s electrically insulating, stiff, extremely smooth and flat, and can be structured with very fine features. In addition, we can customize properties such as coefficient of thermal expansion and Young's Modulus across very relevant ranges for semiconductor package applications."
Traditional organic substrates, by contrast, can warp, degrade, or interfere with signals under the same conditions, limiting both the speed and reliability of high-performance computing systems.
Think of computing systems like a city. For centuries, people relied on cobblestone streets to get around. The uneven surface was manageable at walking speeds, but once automobiles came along, the ride became rough, unstable, and inefficient. In that sense, glass is like newly paved asphalt for computing: smooth, level, and built for high-speed performance. The flatter the surface, the faster and more reliably you can go.
So where does glass fit in semiconductor devices? Colin breaks it down: "Semiconductor chips, produced on silicon wafers, need to be put into a 'package' that delivers power and electrical signals and protects the devices,” he says. “These packages are built on a 'substrate' that consists of layers of dielectric polymer and copper wiring. The chips are then connected on top of the substrate and enclosed into a package.
“Glass would be used inside the layers of polymer and copper wiring as a rigid reinforcement layer; in other words – a glass core,” he continues. “The glass would be 'laminated' with layers of polymer and copper wiring, and chips would then be placed on top of those layers."
That's why the glass-core approach is already gaining traction. By allowing for finer wiring and more connection points without sacrificing signal integrity – as well as improving thermal management – glass-core substrates enable smaller, more efficient, and more powerful chip designs. Big players in the semiconductor space have begun investing heavily in this technology, with commercial adoption expected to expand significantly before the end of the decade.
The race to semiconductor solutions
As the industry prepares for this next leap, suppliers are racing to provide the materials and manufacturing expertise needed to scale up. "We are leveraging our specialty glass material and manufacturing expertise to meet the semiconductor industry´s evolving needs," says Dr. Christian Leirer, VP of Semicon Glass Solutions at SCHOTT. “Our ability to consistently manufacture high-quality glass products with exceptional surface smoothness and dimensional stability for glass-core substrates, combined with the glass properties required, gives designers the freedom to build advanced architectures without compromise."
It’s not just about making glass—it’s about making the right glass, with the right properties, and the right dimensions. And by supporting architectural breakthroughs in semiconductor packaging, glass could become critical to the future of AI and other emerging technologies.
"Glass is positioned to enable packaging advancements that will help scale future generations of pioneering AI models, transform our global communications infrastructure, and carry forward the spirit of Moore’s Law into a new era of computational innovation," Colin says.
To his point, this was also part of the future Gordon Moore saw coming in 1965. Dig deeper into the fateful article wherein Moore’s Law was born, and you’ll find the young engineer actually anticipated that as systems grew more complex, it might prove more economical “to build large systems out of smaller functions, which are separately packaged and interconnected.”
It's a striking vision that now takes shape in the form of chiplet-based, heterogeneous integration strategies. By enabling these modular architectures on a flat, stable glass-core substrate, manufacturers can push performance further than ever before, without relying solely on shrinking transistors.
With glass making this leap possible, Moore’s legacy continues – not as a memory, but as a blueprint for what comes next.
