EML TEC TO Package (Pedestal)

Cooled header for EML applications, economical alternative to box packages.

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About

The SCHOTT TEC TO package is a newly developed transistor outline (TO) which is ideal for laser diodes that require a thermoelectric cooler (TEC). The thermoelectric cooler allows for controlled heat dissipation, which leads to regulated and stable laser wavelengths and higher power signal transmission.

TEC TO (Pedestal) are suitable for EML chips in single-channel DWDM in 10Gb Ethernet, CPRI, XGPON and other tunable laser applications.

Product variants

Modul Speed OSA Type Fiber TO Can Description Function
XFP 25 Gbps
50 Gbps
Tx SMF TO-56, 1 x 50-ohm, 6+1 Large space for TEC, 2 TEC pin,
Separate Thermistor, MPD, LD bias,
50-ohm Signal pin, one gnd pin

Product images

25G EML Cool Header

25G  EML Cool Header

25G EML Cool Header with components

TEC TO with components

50G Cooled EML Header

50G Cooled EML Header

50G Cooled EML Header with components

50G Cooled EML Header with components

Product performance

25G EML cooled header

S11 (dB) – Reflection/Return Loss

S11 (dB) – Reflection/Return Loss

S11: Better than -15dB @30GHz for speeds of up to 25 Gbps.

S21 (dB) – Insertion Loss

S21 (dB) – Insertion Loss

S21: 3dB bandwidth better than 30GHz.

Pedestal TEC TO- simulation result-Port 1 Port 2

Pedestal TEC TO- simulation result-Port 1 Port 2

50G EML cooled header

Insertion and Return Loss

Simulation based on LD height of 2.5mm

Simulation based on LD height of 2.5mm S11: Better than -15dB @40GHz S21: 3dB bandwidth better than 60GHz

Header with TEC, FPC and EML Submount

Header with TEC, FPC and EML Submount

56 GBaud PAM4 Eye Diagram with 50G EML chip

56 GBaud PAM4 Eye Diagram with 50G EML chip

simulation graphic of 50G Pedestal TEC TO, Port 1

simulation graphic of 50G Pedestal TEC TO, Port 1

Simulation graphic of 50G Pedestal TEC TO, Port 2, 3, 4

simulation graphic of 50G Pedestal TEC TO, Port 2, 3, 4